Improving the performance This paper analyzes the efficiency of silicon MOSFETs in surface-mount (SMD) packages with top-side cooling compared to bottom-side cooling packages in terms of thermal performance, lowering both thermal resistance and operating temperatures. It will show how reducing the junction temperature helps to boost power efficiency due to a smoother variation of the main silicon MOSFET parameters due to temperature changes such as RDS(on) and Vth level as well as reduces total conduction and switching losses.
The market for power-conversion products is modernizing quickly, in response to changes in the way electrical power is generated and managed. Moreover, for electricity is increasing, to feed a huge and rapidly expanding variety of loads with different specifics and requirements. This modernization is driving the redesign of power converters at all stages to meet demands for increased power density and power efficiency, better thermal management, and reduced weight and size. In some cases, the converters need to implement bidirectionality.
Overview of DC/DC Converter
The DC/DC stage of a power converter is a key part of a power supply. This stage converts an input constant voltage to a controlled DC output voltage, which can be higher or lower than the input depending on whether the converter is a step-down or step-up converter. DC/DC converters can be unidirectional, with fixed input and output stage, or bidirectional with interchangeable input and output.
Figures 1 and 2 show the most common unidirectional topologies for half-bridge (HB) LLC resonant and full-bridge (FB) phase-shift converters.
These various topologies share a common characteristic: they all operate with zero-voltage switching (ZVS) at turn-on to reduce the switching losses.
Bottom side and top side cooling SMD packages
Power devices like MOSFETs and IGBTs, including ordinary silicon as well as wide-bandgap silicon-carbide (SiC) and gallium nitride (GaN) devices, are housed in packages designed to protect against humidity and external pollutions as well as ensuring electrical isolation.
The market trend now is towards surface-mount (SMD) package styles, compared to through-hole, because they permit:
- More compact solutions with lower mounted height
- Good level of thermal performance
- Increased power density
Surface-mount packages can be categorized as:
- Bottom-side cooling packages such as D2PAK and TO-LL, designed to dissipate the heat generated by the silicon die through the bottom lead frame. These packages use the PCB as a heatsink and connect to a copper slug and/or vias in the board.
- Top-side cooling packages such as HU3PAK dissipate the heat generated by the silicon die through the top lead frame, coupled with a specific heatsink placed on the top side of the package.
This evaluation compares the thermal performance of the HU3PAK top-side cooling package with that of D2PAK and TO-LL bottom-side cooling packages under the same working and thermal system conditions.
Power loss analysis
This section presents the equations [1-4] and preliminary power losses. These power losses provide the input data for thermal modeling and analysis of the SMD packages. The test vehicle is a 3kW full-bridge LLC converter. Starting from the equations 1, 2, 3, and 4 , the primary MOSFETs losses are evaluated at five load points: 10%, 20%, 50%, 75%, and 100% of the maximum power (3kW). Table 2 summarizes the losses.
Switching losses, driver losses, and diode losses are the same because the power-loss model calculates them at the resonance frequency.
This first analysis of power losses is useful to find out the operative point of the silicon in terms of junction temperature (Tj). The device inside the three different packages, D2PAK, TO-LL and HU3PAK is the same. The device has RDS(on) at 25°C equal to 80 mΩ.
In the next paragraph the thermal analysis finds out different junction temperatures for all of three packages due to the different values of junction-to-ambient thermal resistance (RthJA) of the packages.
Thus, different junction temperatures impact on the RDS(on) and on the gate threshold voltage (VGSth).
Tj has a much greater influence on the RDS(on) than on VGSth. For this reason the conduction losses are calculated based only on the Tj values and different RDS(on) values. Table 3 reports the multiplicative coefficients for RDS(on) for the three different packages.
The results for the HU3PAK confirms that this top-side cooling package maintains a lower junction temperature when operating at the same power level as the other packages. It therefore dissipates less power and hence raises the overall power efficiency (because RDS(on) is elevated at higher junction temperature (ref. figure 8). Hence a more thermally efficient package that ensures a lower Tj helps minimize power losses).
Thermal simulations and analysis
This section focuses on the thermal simulation performed to validate the top-side cooling solution. The simulation has been performed using the numerical finite element methodology. This approach made it possible to evaluate the thermal behavior of the power MOSFET attached by means of a thermal interface material (TIM) to a printed circuit board (PCB). The power losses used in the simulation come from the real operating conditions (DC/DC converters at light and full load) as shown in the previous session.
A simulated benchmark has been done considering three package solutions: D2PAK and TO-LL as bottom side cooled and HU3PAK as top side one. The first evaluation, shown in this digest, has been performed at steady state. The same heatsink is used for the simulations, placed on the bottom side of the PCB’s thermal vias for D2PAK and TO-LL and directly on the top exposed copper frame in experiments on the HU3PAK.
Moreover, same 2-layer PCB (2 oz copper) with thermal vias, TIM and boundary conditions (Tamb=25 °C, heat-transfer coefficient (Htc) = 750 W/m2K on heatsink surface) are applied to all the physical models.
Table 5 presents the results from the first simulation to predict the Tjmax for each of the three devices at 10%, 20%, 50%, 75%, and 100% of full load. The results, shown in table 5, confirm similar behavior for TO-LL and D2PAK, with lower temperatures for HU3PAK. The temperature difference is more evident at full load.
The next experiment performs thermal simulations for each device, considering the updated conduction losses coming from table 4.
Figure 12 presents the simulated thermal maps at full load for TO-LL, D2PAK and HU3PAK.
The results show that D2PAK and TO-LL have an equivalent thermal behavior, while HU3PAK reaches lower temperatures at the same load points.
As expected, the better thermal behavior of HU3PAK is mainly due to the top-side cooling. The superior thermal performance is most evident at full load.
Finally, the Rth j-amb is extracted for each package, which confirms the HU3PAK performs better than the other two packages.
The final step validates the model by comparing simulation and experimental results , as shown in Figure 15.
The device shown is the TO-LL. It was mounted on a PCB identical to that used in the simulations carried out in the previous paragraph, thus obtaining the results shown in table 7 .
Regarding the boundary conditions, an adiabatic behavior was considered on the underside of the PCB and heat-transfer coefficient (Htc) of 11 W/m2K on the top-side surface of the package and PCB.
The model is validated with a margin of error of less than 1.5%, which indicates a good agreement between simulations and experimental measurements.
The HU3PAK package, with its top-side cooling capabilities, shows many advantages compared to other SMD packages like D2PAK and TO-LL. It permits greater power density thanks to of its increased heat dissipation capability when used with the same heat sink size and PCB thermal characteristics (copper weight).
As shown, the HU3PAK reduce the Rthj-amb by up to 18 % with respect to the more common bottom-side cooling approach used in D2PAK and TO-LL.
Also bear in mind that the simulations were carried out with the same cooling system for all of the three packages considered. However, the thermal performance of HU3PAK can be further improved by optimizing the cooling system.